RF Interconnect Insights for High Speed Digital Signals and Data Communications Part 2
In the previous blog, Part 1 of “RF Interconnect Insights for High Speed Digital Signals and Data Communications” two part series, the concept of RF interconnect used in high speed digital applications was introduced. In this section, more insights will be provided on intermodulation distortion concerns and other challenges with trends in high speed digital data transfer and near-future wireless communications that rely on digital signals.
When it comes to reducing interference. some RF connectors are better than others and, as passive intermodulation, or PIM, is a major cause of signal degradation. Especially considering the latest high speed digital data communications for cellular and wireless backhaul, the high peak power ratios make PIM a substantial consideration. PIM is detected as unwanted signals created by the mixing of two or more strong RF signals in a nonlinear device, as a loose or corroded connector, or by rust on the interconnect device.
Unfortunately, the source of PIM isn’t always so easily explained, and for high speed digital data communications, can be a product of material use, cable design, connector design, connector material matchup, connector tightness, and other factors. PIM becomes a problem when, for example, PIM is generated, it increases the noise floor and interferes with wireless device signals leading to access failures, slower data rates, and dropped calls. Conditions that lead to PIM:
< poor cable termination
< damaged or loose connector
< over-torqued or broken connector
< metal flakes or debris inside the connector or inside the cable
Proper termination on the cable and the connector and proper torquing techniques when installing an interconnect to the interface can greatly reduce the amount of PIM.
As RF/microwave technologies are increasingly used in the high speed digital data exchange world, the mix of connector and cable technologies will necessarily become more complex. In the next generation of wireless technology, higher data rates and greater demand for high integrity interconnect will require higher performance capabilities in RF interconnection–with proposed 5G and wireless communication frequencies reaching almost 80 GHz, this means that the digital signal speed and density that drives these communications will also be unprecedented speeds. To meet these high frequency and performance needs, RF interconnects product design and manufacturing is expanding to improve interface compatible designs that are tested and qualified per EIA-364 standards with high GHz performance, high durability cycles.
With high speed digital signals, challenges associated with digital systems such as clock skew, jitter, power consumption, bit error rate (BER), and signal integrity using conventional copper interconnect technology may not meet the needs for current and future Very Large Scale Integration (VLSI) circuits. In order to address these concerns and improve performance to meet high speed demands, adopting RF/wireless interconnects in future on-chip and board-level clock distribution networks may offer desired performances for future high speed clock distribution network operating in multi GHz frequencies.
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