Highlights of Low Noise Amplifier Input-Protection

Though highly sensitive receivers require low noise amplifiers (LNAs) that are also sensitive to extremely weak signals, this sensitivity can also put the receiver front end LNAs at risk of desensitization, latent performance degradation, or destruction. In the presence of a signal strength at the input of an LNA that exceeds the input signal power threshold, damage and degradation become increasingly likely. Two common methods of LNA failure when exposed do high input power signals are overheating from high RF power losses and overstress from the high RF voltages at the input of the LNA transistors.

LNAs are typically constructed of small transistors with metallic interconnect optimized for low noise, low phase noise, and high linearity. Hence, when high RF signal powers are passed through these narrow traces and small transistors, substantial RF losses are experienced which can lead to substantial heating.

The occurrence of high input powers must be considered for radar, sensing, imaging, and communication circuits that may become jammed or are collocated with high power RF/microwave systems. This could range from aerospace, satellite, defense, and naval applications. Moreover, the latest phased-array and multi-input multi-output (MIMO) radar technology inherently faces concerns of high RF input power levels from TX and RX antenna coupling.

Input protection for LNAs is critical in these applications. However, the addition of any circuitry in the signal chain from the antenna to the digitization electronics can lead to reduced linearity, higher noise, and higher phase noise. Considering that noise and phase noise are additive effects for every component and device in the signal chain, minimizing the number of components and devices in the signal chain and their individual noise and phase noise response is a top consideration.

One method of LNA input protection is the use of low loss input PIN Diode Limiters and LNA gain stages composed of transistors with high input power thresholds.

PIN diode limiters are essentially an incident-power-controlled, variable resistor. At low signal power levels the impedance of the PIN limiter diode is at its highest. In this design and at the high impedance state, the PIN limiter diode presents minimal insertion loss. This is desirable as any insertion loss in this portion of the signal chain results in lower receiver sensitivity.

If a large input signal that exceeds the diodes threshold is presented at the limiter’s input, the impedance of the limiter rapidly drops. This results in an impedance mismatch that reflects the signal power back along the signal chain. The resulting much weaker signal at the LNA input avoids damaging the LNA at the cost of temporary desensitization.

Learn more about Pasternack’s extensive line of Input Protected Low Noise Amplifiers: https://www.pasternack.com/pages/Featured_Products/input-protected-low-noise-amplifiers.html